Vladimir Zdraveski

About

Vladimir Zdraveski was born in Prilep in 1988. Graduated in 2010 in the field of Computer Science and Engineering, took a master’s degree in e-Technologies and Computer Networks in 2012 and finished his Ph.D. in the field of Computer Science and Engineering in 2017. Now he is a Ph.D. at a position of an assistant professor at the Faculty of Computer Science and Engineering, Ss. Cyril and Methodius University in Skopje and works as a part time software architect at ByteWorx GmbH (member of B+S Banksysteme Aktiengesellschaft). Participated in few international and local research projects, published several papers, co-authored one book and two patents. His ongoing research is focused to engaging high-performance computing tools in the field of financial technologies and stock trading systems. His academic and industrial interests are also related to digital system design with HDL, electronic design automation tools, power distribution networks' optimization, semantic web, web technologies, parallel programming and enterprise software development.

Master studies teaching courses:

Smart financial and stock trading systems

Undergraduate studies teaching courses:

Computer Architecture and Organization

Business and management

Concepts of information society

High-performance computing

Parallel and distributed processing

Parallel programming

ICT project management

ICT innovations

Publications

Patents

Method and system for dynamic intelligent load balancing

Kocarev, Ljupco, Vladimir Zdraveski, and Mirko Todorovski. "Method and system for dynamic intelligent load balancing." U.S. Patent 10,218,179, issued February 26, 2019.

Battery control methods and circuits, and energy storage to grid connection systems

Kocarev, Ljupco, Vladimir Zdraveski, Mirko Todorovski, Andrej Gajduk, and Lasko Basnarkov. "Battery control methods and circuits, and energy storage to grid connection systems." U.S. Patent 10,574,057, issued February 25, 2020.

Journal articles

ISO-Standardized Smart City Platform Architecture and Dashboard

Vladimir Zdraveski, Kostadin Mishev, Dimitar Trajanov, and Ljupco Kocarev. "ISO-Standardized Smart City Platform Architecture and Dashboard." IEEE Pervasive Computing 16, no. 2 (2017): 35-43. Impact Factor: 3.25.

Dynamic Load Balancing and Reactive Power Compensation Switch embedded in Power Meters

Vladimir Zdraveski, Mirko Todorovski, Dimitar Trajanov, Ljupco Kocarev, "Dynamic Load Balancing and Reactive Power Compensation Switch embedded in Power Meters", Transactions on Circuits and Systems (TCAS) II, Volume PP, May 2016, ISSN 1549-7747, 10.1109/TCSII.2016.2570338. Impact Factor: 1.234.

Dynamic intelligent load balancing in power distribution networks

Vladimir Zdraveski, Mirko Todorovski, Ljupco Kocarev, "Dynamic intelligent load balancing in power distribution networks", International Journal of Electrical Power & Energy Systems, Volume 73, December 2015, Pages 157-162, ISSN 0142-0615, http://dx.doi.org/10.1016/j.ijepes.2015.05.012. Impact Factor: 3.43.

Conference papers

Linked Data Based Power Grid Management

Vladimir Zdraveski, Trajanov, Dimitar, and Kocarev, Ljupco. "Linked Data Based Power Grid Management." In 8th Small Systems Simulation Symposium, pp. 9-20. 2020.

A GPU Implementation of FastICA in Audio Applications for Small Number of Components

Kanan, Stefan, Marjan Gusev, and Vladimir Zdraveski. Kanan, Stefan, Marjan Gusev, and Vladimir Zdraveski. "A GPU Implementation of FastICA in Audio Applications for Small Number of Components." Proceedings of the 9th Balkan Conference on Informatics. 2019.

Bi-Source Verification Against Silent Data Corruption in High Performance Computing

Ajdaraga Krluku, Era, Marjan Gusev, and Vladimir Zdraveski. "Bi-Source Verification Against Silent Data Corruption in High Performance Computing." Proceedings of the 9th Balkan Conference on Informatics. 2019.

Calculating average shortest path length using Compute Unified Design Architecture (CUDA)

Petrushevski, Stefan, Marjan Gusev, and Vladimir Zdraveski. "Calculating average shortest path length using Compute Unified Design Architecture (CUDA)." 42nd International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO). IEEE, 2019.

Parallel Implementation of K-Nearest-Neighbors for Face Recognition

Despotovski, Filip, Marjan Gusev, and Vladimir Zdraveski. "Parallel Implementation of K-Nearest-Neighbors for Face Recognition." In 2018 26th Telecommunications Forum (TELFOR), pp. 1-4. IEEE, 2018.

How CUDA Powers the Machine Learning Revolution

Ilievski, Andrej, Vladimir Zdraveski, and Marjan Gusev. "How CUDA Powers the Machine Learning Revolution." In 2018 26th Telecommunications Forum (TELFOR), pp. 420-425. IEEE, 2018.

Efficiently Running SQL Queries on GPU

Dojchinovski, Dimitri, Marjan Gusev, and Vladimir Zdraveski. "Efficiently Running SQL Queries on GPU." In 2018 26th Telecommunications Forum (TELFOR), pp. 1-4. IEEE, 2018.

Parallel Implementation of an Algorithm for Atrial Fibrillation Detection Using RR Intervals and Shannon Entropy

Boshkovska, Martina, Marjan Gusev, and Vladimir Zdraveski. "Parallel Implementation of an Algorithm for Atrial Fibrillation Detection Using RR Intervals and Shannon Entropy." In 2018 26th Telecommunications Forum (TELFOR), pp. 1-4. IEEE, 2018.

Challenges and opportunities in applying semantics to improve access control in the field of internet of things

Stojanov, Riste, Vladimir Zdraveski, and Dimitar Trajanov. "Challenges and opportunities in applying semantics to improve access control in the field of internet of things." ELECTRONICS 21, no. 2 (2018): 66-75.

Dark data in internet of things (IoT): Challenges and opportunities

Trajanov, Dimitar, Vladimir Zdraveski, Stojanov, Riste, and Kocarev, Ljupco. "Dark data in internet of things (IoT): Challenges and opportunities." In 7th Small Systems Simulation Symposium, pp. 1-8. 2018.

Stock Market Ontology

Vladimir Zdraveski, Mihail Jovanoski, and Uwe Franke, "Stock Market Ontology", Proceedings of the 9th International Conference ICT Innovations 2017, pp. 88-94, 2017, Skopje, Macedonia.

An OpenMP runtime profiler/configuration tool for dynamic optimization of the number of threads

Dancheva, T., Gusev, M., Zdravevski, V., & Ristov, S. (2016, May). An OpenMP runtime profiler/configuration tool for dynamic optimization of the number of threads. In 2016 39th International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO) (pp. 192-197). IEEE.

Improving HDL Higher Level Logical Analysis Using Boolean Function Feature

Zdraveski, V., Dimitrovski, A., Trajanov, D., "Improving HDL Higher Level Logical Analysis Using Boolean Function Feature", Proceedings of the 5th Small Systems Simulation Symposium (SSSS), 2016, Faculty of Electronic Engineering, Nis, Serbia.

Live Objects-Collaborative Window in the Corporate Documents

Stojanov, R., Georgiev, M., Zdraveski, V., Jovanovik, M., Trajanov, D., "Live Objects-Collaborative Window in the Corporate Documents", New Trends in Database and Information Systems II, pp. 71-81, 2015, Springer International Publishing.

Case studies of forest fire detection systems

Karafilovski, I., Zdraveski, V., Trajanov, D.,"Case studies of forest fire detection systems", 11th International Conference on Informatics and Information Technologies (CIIT), Web proceedings, 2014.

HDL IP Cores System as an Online Testbench Provider

Zdraveski, V., Dimitrovski, A., Trajanov, D., "HDL IP Cores System as an Online Testbench Provider", Proceedings of the 5th Small Systems Simulation Symposium (SSSS), pp. 108-112, 2014, Faculty of Electronic Engineering, Nis, Serbia.

Implementation of Green IT concepts in R. Macedonia

Gavrilovska, D., Zdraveski, V., Trajanov, D., "Implementation of Green IT concepts in R. Macedonia", Proceedings of the International Conference ETAI, 2013.

Analysis of Green IT challenges for Macedonian companies

Gavrilovska, D., Zdraveski, V., Trajanov, D., "Analysis of Green IT challenges for Macedonian companies", Telecommunications Forum (TELFOR), 2013 21st, pp. 21-24, 2013, IEEE.

VHDL IP CORES ONTOLOGY

Zdraveski, V., Trajanov, D., "VHDL IP CORES ONTOLOGY", Proceedings of the 10th International Conference on Informatics and Information Technologies (CIIT), Web proceedings, pp. 240-243, 2013.

Semantic sky: a platform for cloud service integration based on semantic web technologies

Trajanov, D., Stojanov, R., Jovanovik, M., Zdraveski, V., Ristoski, P., Georgiev, M., Filiposka, S., "Semantic sky: a platform for cloud service integration based on semantic web technologies", Proceedings of the 8th International Conference on Semantic Systems, pp. 109-116, 2012, ACM.

JDeveloper 11G R2 adapter extension

Ristoski, P., Efremov, M., Zdraveski, V., Trajanov, D., "JDeveloper 11G R2 adapter extension", Proceedings of the 9th International Conference on Informatics and Information Technologies (CIIT), Web proceedings, pp. 19-23, 2012.

Social Networks for Customer Relationship Management

Jovanovik, M., Zdraveski, V., Gusev, M., "Social Networks for Customer Relationship Management", Molika, Bitola, Proceedings of the 9th International Conference on Informatics and Information Technologies (CIIT), Web proceedings, pp. 299-302, 2012.

About

Master studies teaching courses:

Undergraduate studies teaching courses:

Experience

Software Architect

Assistant professor

Senior Java Developer

Embeded Systems consultant

junior teaching and research assistant

junior teaching and research assistant

demonstrator on laboratory exercises

PCB designer and junior embedded software developer

Education

Ph.D.

Master's degree

Bachelor's degree

High school

Skills

Java

Parallel Computing

Embedded Systems

FPGA & VHDL

English

German

Serbian

Albanian

Publications

Patents

Journal articles

Conference papers

Office Hours

Contact